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DA9021 Datasheet(PDF) 102 Page - Dialog Semiconductor |
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DA9021 Datasheet(HTML) 102 Page - Dialog Semiconductor |
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102 / 142 page ![]() DA9021/22 System PMIC with high efficiency USB power manager Datasheet Revision 2.5 17-Feb-2017 CFR0011-120-00 Rev 5 102 of 142 © 2017 Dialog Semiconductor Register address Bit Type Label Default Description the voltage is ramping, write access is blocked to LDO3 register. VLDO3_GO is cleared when the target voltage is reached (ignored if LDO3_CONF was asserted) 5 R/W 0 RESERVED 6 R/W 0 RESERVED 7 R/W V_LOCK 0 0: Allows writing new values into buck and LDO voltage registers 1: Disables voltage re-programming from the host (enable/disable, DVC ramping, power sequencing including deferred update still possible) Table 96: PULLDOWN Register address Bit Type Label Default Description R61 PULLDOWN 0 R/W CORE_PD _DIS 0 0: Enable pull down resistor 1: No pull down resistor in disabled mode 1 R/W PRO_PD_ DIS 0 0: Enable pull down resistor 1: No pull down resistor in disabled mode 2 R/W MEM_PD_ DIS 0 0: Enable pull down resistor 1: No pull down resistor in disabled mode 3 R/W LDO1_PD _DIS 0 0: Enable pull down resistor 1: No pull down resistor in disabled mode 7:4 R/W 0000 RESERVED |
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