AD9136-EBZ datasheet(48/117 Pages) AD

48 / 117 page

AD9135/AD9136

Data Sheet

Rev. C | Page 48 of 117

TRANSPORT LAYER

Figure 60. Transport Layer Block Diagram

The transport layer receives the descrambled JESD204B frames

and converts them to DAC samples based on the programmed

JESD204B parameters shown in Table 43. A number of device

parameters are defined in Table 44.

Table 43. JESD204B Transport Layer Parameters

Parameter

Description

Number of octets per frame per lane: 1, 2, or 4.

Number of frames per multiframe.

K = 32 if F = 1, K = 16 or 32 otherwise.

Number of lanes per converter device (per link), as

follows:

1, 2, 4, or 8 (single-link mode).

1, 2, or 4 (dual-link mode).

Number of converters per device (per link), as follows:

1 or 2 (single-link mode).

1 (dual-link mode).

Number of samples per converter, per frame: 1 or 2.

Table 44. JESD204B Device Parameters

Parameter

Description

Number of control words per device clock per link.

Not supported, must be 0.

Number of control bits per conversion sample. Not

supported, must be 0.

High density user data format. Used when samples

must be split across lanes.

Set to 1 when F = 1, otherwise 0.

Converter resolution = 16.

ʹ (or NP)

Total number of bits per sample = 16.

Certain combinations of these parameters, called JESD204B

operating modes, are supported by the AD9135/AD9136. See

Table 45 and Table 46 for a list of supported modes, along with

their associated clock relationships.

DELAY

BUFFER 0

DELAY

BUFFER 1

F2S_0

F2S_1

DAC0 [15:0] OR [11:0]

PCLK_1

LANE 0 OCTETS

LANE 7 OCTETS

PCLK_0

SPI CONTROL

LANE 3 OCTETS

LANE 4 OCTETS

DAC1 [15:0] OR [11:0]

TRANSPORT LAYER

(QBD)

SPI CONTROL

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