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AD9136-EBZ Datasheet(PDF) 89 Page - Analog Devices |
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AD9136-EBZ Datasheet(HTML) 89 Page - Analog Devices |
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89 / 117 page ![]() Data Sheet AD9135/AD9136 Rev. C | Page 89 of 117 Address Name Bit No. Bit Name Settings Description Reset Access 0x00A SCRATCH_PAD [7:0] SCRATCHPAD This register does not affect any functions in the part and can be used for testing SPI communication with the part. Any value written to this register will be read back to reflect the change unless a reset or power- cycle occurs. 0x00 R/W 0x011 PWRCNTRL0 7 PD_BG Reference Power-Down. Powers down the band gap reference for the entire chip. Circuits will not be provided with bias currents. 0x0 R/W 1 Power down reference 6 PD_DAC_0 Powers Down DAC0. Powers down the I-channel DAC. 0x1 R/W 1 Powers down DAC0 5 RESERVED Reserved. 0x0 R 4 PD_DAC_1 Powers Down DAC1. Powers down the Q-channel DAC. 0x1 R/W 1 Powers down DAC1 3 RESERVED Reserved. 0x0 R 2 PD_DACM Powers Down the DAC Master Bias. The master bias cell provides currents and DAC full-scale adjustments to the four DACs. With the DAC master bias powered down, the DACs are inoperative. 0x1 R/W 1 Powers down the DAC master bias [1:0] RESERVED Reserved. 0x0 R 0x012 TXENMASK [7:2] RESERVED Reserved. 0x0 R 1 DAC1_MASK DAC1 TXEN1 Mask. Power down DAC1 on a falling edge of TXEN1. 0x0 R/W 1 If TXEN1 is low, power down DAC1 0 DAC0_MASK DAC0 TXEN0 Mask. Power down DAC0 on a falling edge of TXEN0. 0x0 R/W 1 If TXEN0 is low, power down DAC0 0x013 PWRCNTRL3 [7:6] RESERVED Reserved. 0x0 R 5 TX_PROTECT_OUT 1 TX_PROTECT triggers PROTECT_OUTx. 0x1 R/W 4 RESERVED Reserved. 0x0 R 3 SPI_PROTECT_ OUT 1 SPI_PROTECT triggers PROTECT_OUTx. 0x0 R/W 2 SPI_PROTECT SPI_PROTECT 0x0 R/W [1:0] RESERVED Reserved. 0x0 R 0x014 GROUP_DLY [7:4] RESERVED Reserved. 0x8 R [3:0] GROUP_DLY Group Delay Control. Delays the selected DAC channel output per the paging register. 0 = minimum delay. 15 = maximum delay. The range of the delay is −4 to +3.5 DAC clock periods, and the resolution is 1/2 DAC clock period. 0x8 R/W 0x01F IRQEN_ STATUSMODE0 7 IRQEN_SMODE_ CALPASS Calibration Pass Detection Status Mode. 0x0 R/W 1 If CALPASS goes high, it latches and pulls IRQ low 0 CALPASS shows current status 6 IRQEN_SMODE_ CALFAIL Calibration Fail Detection Status Mode. 0x0 R/W 1 If CALFAIL goes high, it latches and pulls IRQ low 0 CALFAIL shows current status 5 IRQEN_SMODE_ DACPLLLOST DAC PLL Lost Detection Status Mode. 0x0 R/W 1 If DACPLLLOST goes high, it latches and pulls IRQ low 0 DACPLLLOST shows current status |
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