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AD9136-EBZ Datasheet(PDF) 65 Page - Analog Devices |
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AD9136-EBZ Datasheet(HTML) 65 Page - Analog Devices |
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65 / 117 page ![]() Data Sheet AD9135/AD9136 Rev. C | Page 65 of 117 DIGITAL DATAPATH Figure 73. Block Diagram of Digital Datapath The block diagram in Figure 73 shows the functionality of the digital datapath (all blocks can be bypassed). The digital processing includes three half-band interpolation filters, an inverse sinc filter, and gain, offset, and group delay adjustment blocks. Note that the pipeline delay changes when digital datapath functions are enabled/disabled. If fixed DAC pipeline latency is desired, do not reconfigure these functions after initial configuration. DAC PAGING Digital datapath registers are paged to allow configuration of either DAC independently or both simultaneously. Table 60 shows how to use the DAC paging bits. Table 60. Paging Modes DAC_PAGE, Register 0x008[1:0] DACs Paged 1 DAC0 2 DAC1 3 (default) DAC0 and DAC1 Several functions are paged by DAC, such as input data format, downstream protection, interpolation, inverse sinc, digital gain, dc offset, group delay, datapath PRBS, and LMFC sync. DATA FORMAT BINARY_FORMAT (Register 0x110[7]), paged as described in the DAC Paging section) controls the expected input data format. By default it is 0, which means the input data must be in twos complement. It can also be set to 1, which means the input data is in offset binary. For the AD9136, 0x0000 is negative full scale and 0xFFFF is positive full scale. For the AD9135, 0x0000 is negative full scale and 0xFFE0 is positive full scale. Though the AD9135 is an 11-bit resolution DAC at the output, the input to the part must still be 16-bits wide for proper 8-bit/10-bit decoding. The AD9135 uses a 16-bit datapath that is truncated to 11 bits before going into the DAC core. Either 11-bit zero- padded data or full 16-bit data can be sent into the device, with the latter having slightly better spectral performance by minimizing quantization error along the datapath. INTERPOLATION FILTERS The transmit path contains three half-band interpolation filters, which each provide a 2× increase in output data rate and a low- pass function. The filters can be cascaded to provide a 4× or 8× interpolation ratio. Table 61 shows how to select each available interpolation mode, their usable bandwidths, and their maximum data rates. Note that fDATA = fDAC/Interpolation Factor. Interpolation mode is paged as described in the DAC Paging section. Register 0x030[0] is high if an unsupported interpolation mode is selected. Table 61. Interpolation Modes and Usable Bandwidth Interpolation Mode INTERP_MODE, Reg. 0x112[2:0] Usable Bandwidth Maximum fDATA (MHz) 1× (bypass)1 0x00 0.5 × fDATA 21202 2× 0x01 0.4 × fDATA 10602 4× 0x03 0.4 × fDATA 700 8× 0x04 0.4 × fDATA 350 1 Mode 8 and Mode 11 can only use 1× interpolation. 2×, 4×, and 8× interpolation are only available in Mode 9, Mode 10, Mode 12, and Mode 13. 2 The maximum speed for 1× and 2× interpolation is limited by the JESD204B interface. See Table 4 for the appropriate supply levels. Filter Performance The interpolation filters interpolate between existing data in such a way that they minimize changes in the incoming data while suppressing the creation of interpolation images. This is shown for each filter in Figure 74. The usable bandwidth (as shown in Table 61) is defined as the frequency band over which the filters have a pass-band ripple of less than ±0.001 dB and an image rejection of greater than 85 dB. Figure 74. All Band Responses of Interpolation Filters Filter Performance Beyond Specified Bandwidth The interpolation filters are specified to 0.4 × fDATA (with pass band). The filters can be used slightly beyond this ratio at the expense of increased pass-band ripple and decreased interpolation image rejection. INTERPOLATION MODES 1×, 2×, 4×, 8× INV SINC DIGITAL GAIN, DC OFFSET, AND GROUP DELAY ADJUSTMENT 0 –20 –40 –60 –80 –100 0 0.2 0.4 0.6 0.8 1.0 FREQUENCY (× fDAC) 2× 4× 8× |
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