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AD9136-EBZ Datasheet(PDF) 98 Page - Analog Devices |
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AD9136-EBZ Datasheet(HTML) 98 Page - Analog Devices |
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98 / 117 page ![]() AD9135/AD9136 Data Sheet Rev. C | Page 98 of 117 Address Name Bit No. Bit Name Settings Description Reset Access 0x0E7 CAL_CLKDIV [7:4] RESERVED Must write the default value for proper operation. 0x3 R/W 3 CAL_CLK_EN Enable Self Calibration Clock. 0x0 R/W 1 Enable calibration clock 0 Disable calibration clock [2:0] RESERVED Reserved. 0x0 R 0x0E8 CAL_PAGE [7:4] RESERVED Reserved. 0x0 R [3:0] CAL_PAGE DAC Calibration Paging. Selects which of the DACs are being accessed for calibration or calibration readback. This paging affects Register 0x0E9 and Register 0x0ED. 0xF R/W Calibration: any number of DACs can be accessed simultaneously to write and calibrate. Write a 1 to Bit 0 to include DAC0. Write a 1 to Bit 2 to include DAC1. Readback: only one DAC at a time can be accessed when reading back CAL_CTRL (Register 0x0E9). Write a 1 to Bit 0 to read from DAC0 or write a 1 to Bit 2 to read from DAC1 (the other bits must be 0). 0x0E9 CAL_CTRL 7 CAL_FIN Calibration finished. This bit is high when the calibration has completed. If the calibration completes and either CAL_ERRHI or CAL_ ERRLO is high, then the calibration cannot be considered valid and are considered a timeout event. 0x0 R 1 Calibration ran and is finished 6 CAL_ACTIVE Calibration Active. This bit is high while the calibration is in progress. 0x0 R 1 Calibration is running 5 CAL_ERRHI SAR Data Error: Too High. This bit is set at the end of a calibration cycle if any of the calibra- tion DACs has overranged to the high side. This typically means that the algorithm adjusts the calibration preset of the calibration DACs and runs another cycle. 0x0 R 1 Data saturated high 4 CAL_ERRLO SAR Data Error: Too Low. This bit is set at the end of a calibration cycle if any of the calibra- tion DACs has overranged to the low side. This typically means that the algorithm adjusts the calibration preset of the calibration DACs and runs another cycle. 0x0 R 1 Data saturated low [3:2] RESERVED Reserved. 0x0 R 1 CAL_START Calibration Start. The rising edge of this bit kicks off a calibration sequence for the DACs that have been selected in the CAL_INDX register. 0x0 R/W 0 Normal operation 1 Start calibration state machine 0 CAL_EN Calibration Enable. Enable the calibration DAC of the converter. Enable to calibration engine and machines. Prepare for a calibration start. For calibration coefficients to be applied to the calibrated DACs, this bit must be high. 0x0 R/W 0 Do not use calibration DACs 1 Use calibration DACs |
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