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AD9136-EBZ Datasheet(PDF) 70 Page - Analog Devices |
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AD9136-EBZ Datasheet(HTML) 70 Page - Analog Devices |
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70 / 117 page  AD9135/AD9136 Data Sheet Rev. C | Page 70 of 117 Datapath PRBS IRQ The PRBS fail signals for each DAC are available as IRQ events. Use Register 0x020, Bit 2 and Bit 0, to enable the fail signals, and then use Register 0x024, Bit 2 and Bit 0, to read back their statuses and reset the IRQ signals. See the Interrupt Request Operation section for more information. DC TEST MODE As a convenience, the AD9135/AD9136 provide a dc test mode, which is enabled by setting Register 0x520[1] to 1 and clearing Register 0x146[0] to 0. When this mode is enabled, the datapath is given 0 (midscale) for its data. Register 0x146[0] must be set to 1 for all other modes of operation. In conjunction with dc offset, this test mode can provide the desired dc data to the DACs. |
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