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AD9136-EBZ Datasheet(PDF) 76 Page - Analog Devices

Part # AD9136-EBZ
Description  Digital-to-Analog Converters
PDF  117 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9136-EBZ Datasheet(HTML) 76 Page - Analog Devices

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AD9135/AD9136
Data Sheet
Rev. C | Page 76 of 117
Self Calibration
The AD9135/AD9136 have a self calibration feature that
improves the DAC dc and ac linearity in zero or low IF
applications. The performance improvement includes the
INL/DNL, second and fourth harmonic distortions (HD2 and
HD4), and second-order intermodulation distortion (IMD2) of
the device. Figure 85 and Figure 86 show the typical DAC INL
and DNL before and after the calibration. Figure 87 and Figure 88
show the calibration effect on the HD2, HD4, and IMD2
performance. The improvement from calibration decreases with
the DAC output frequency. For improvement in HD2 and HD4,
it is recommended to run the calibration routine when the
desired output frequency is below 100 MHz. For improvement
in IMD2, it is recommended to run the routine when the desired
output frequency is below 200 MHz. A single run of the routine is
sufficient to obtain the desired performance for both ac and dc
performance.
Figure 85. Pre-Calibration and Post-Calibration, INL
Figure 86. Pre-Calibration and Post-Calibration, DNL
Figure 87. Pre-Calibration and Post-Calibration, HD2 and HD4
Figure 88. Pre-Calibration and Post-Calibration, IMD2
To calibrate, follow the routine in Table 75.
Table 75. Device Self Calibration Procedure
Addr.
Bit
SPI Data
Byte
Description
0x0E7
[7:0]
0x38
Use highest comparator speed
and set calibration clock divider
0x0E8
Select DACs to calibrate
3
0
Set this bit to 0
2
0b0 or 0b1
1 if DAC1 is enabled
1
0
Set this bit to 0
0
0b0 or 0b1
1 if DAC0 is enabled
0x0ED
[7:0]
0xA2
Configure initial value
0x0E9
[7:0]
0x01
Enable calibration
0x0E9
[7:0]
0x03
Start calibration
0x0E7
[7:0]
0x30
Disable calibration clock
For each DAC that is calibrated, verify the calibration status
by writing a 1 in the corresponding bit of CAL_PAGE
(Register 0x0E8) and reading Register 0x0E9. If the calibration
completed correctly, CAL_FIN (Register 0x0E9[7]) = 1 to
indicate that calibration is complete, and Register 0x0E9[6:4] = 0
to indicate that no errors have occurred.
4
–4
–3
–2
–1
0
1
2
3
0
70k
60k
50k
40k
30k
20k
10k
DAC GAIN CODE
CALIBRATION OFF
CALIBRATION ON
4
–2
–1
0
1
2
3
0
70k
60k
50k
40k
30k
20k
10k
DAC GAIN CODE
CALIBRATION OFF
CALIBRATION ON
–40
–100
–90
–80
–70
–60
–50
0
300
250
200
150
100
50
fOUT (MHz)
CALIBRATION OFF
CALIBRATION ON
SECOND HARMONIC
FOURTH HARMONIC
–60
–65
–70
–75
–80
–85
–90
–95
–100
0
300
250
200
150
100
50
fOUT (MHz)
CALIBRATION OFF
CALIBRATION ON



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