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AD9136-EBZ Datasheet(PDF) 75 Page - Analog Devices |
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AD9136-EBZ Datasheet(HTML) 75 Page - Analog Devices |
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75 / 117 page ![]() Data Sheet AD9135/AD9136 Rev. C | Page 75 of 117 ANALOG OUTPUTS TRANSMIT DAC OPERATION Figure 83 shows a simplified block diagram of the transmit path DACs. The DAC core consists of a current source array, a switch core, digital control logic, and full-scale output current control. The DAC full-scale output current (IOUTFS) is nominally 20.48 mA. The output currents from the OUTx± pins are complementary, meaning that the sum of the two currents always equals the full- scale current of the DAC. The digital input code to the DAC determines the effective differential current delivered to the load. Figure 83. Simplified Block Diagram of DAC Core The DAC has a 1.2 V band gap reference. A 4 kΩ external resistor, RSET, must be connected from the I120 pin to the ground plane. This resistor, along with the reference control amplifier, sets up the correct internal bias currents for the DAC. Because the full- scale current is inversely proportional to this resistor, the tolerance of RSET is reflected in the full-scale output amplitude. DACFSC_x (where x is either 0 or 1, corresponding to DAC0 or DAC1) is a 10-bit twos complement value that controls the full- scale current of each of the four DAC outputs. These values are stored in Register 0x040 to Register 0x041 and Register 0x044 to Register 0x045 as shown in Table 74. The typical full-scale current for each DAC is given by IOUTFS = 20.45 + (DACFSC_x × 6.55 mA)/2(10 − 1) For nominal values of VREF (1.2 V), RSET (4 kΩ), and DACFSC_x (0, which is midscale in twos complement), the full-scale current of the DAC is nominally 20.48 mA. The DAC full-scale current can be adjusted from 13.9 mA to 27.0 mA, by programming the appropriate DACFSC_x values in Register 0x040, Register 0x041, and Register 0x044, and Register 0x045. Analog output full-scale current vs. gain DAC code is shown in Figure 84. Table 74. DAC Full-Scale Current Registers Address Value Description 0x040[1:0] DACFSC_0[9:8] DAC0 MSB gain code 0x041[7:0] DACFSC_0[7:0] DAC0 LSB gain code 0x044[1:0] DACFSC_1[9:8] DAC1 MSB gain code 0x045[7:0] DACFSC_1[7:0] DAC1 LSB gain code Figure 84. DAC Full-Scale Current (IOUTFS) vs. Gain DAC Code Transmit DAC Transfer Function The output currents from the OUTx+ and OUTx− pins are complementary, meaning that the sum of the positive and negative currents always equals the full-scale current of the DAC. The digital input code to the DAC determines the effective differential current delivered to the load. OUTx± provides the maximum output current when all bits are high for binary data. The output currents vs. DACCODE for the DAC outputs using binary format are expressed as OUTFS N BIN OUTP I DACCODE I × = 1 – 2 (5) IOUTN = IOUTFS − IOUTP (6) where DACCODEBIN is the 11-/16-bit input to the DAC in unsigned binary. DACCODEBIN has a range of 0 to 2N − 1. If the data format is twos complement, the output currents are expressed as OUTFS N N TWOS OUTP I DACCODE I × + = 1 – 2 2 1 – (7) IOUTN = IOUTFS − IOUTP (8) where DACCODETWOS is the 11-/16-bit input to the DAC in twos complement. DACCODETWOS has a range of −2N − 1 to 2N − 1 − 1. Powering Down Unused DACs Power down any unused DAC outputs to avoid burning excess power. The DAC power downs are located in Register 0x011. Register 0x011, Bit 6 corresponds to DAC0, and Bit 4 to DAC1. Write a 1 to each bit to power down the appropriate DACs. Register 0x011, Bit 7 and Bit 2, must stay low to enable the band gap and DAC master bias, respectively. OUT1+ OUT1– OUT0+ OUT0– CURRENT SCALING DAC1 FULL-SCALE ADJUST DAC0 FULL-SCALE ADJUST 1.2V 4kΩ I120 DAC1 DAC0 28 0 1024 896 768 640 512 GAIN DAC CODE 384 256 128 26 24 22 20 18 16 14 12 |
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