AD9136-EBZ datasheet(67/117 Pages) AD

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Data Sheet

AD9135/AD9136

Rev. C | Page 67 of 117

Table 62. Digital Gain Registers

Bit Name

Description

0x111[5]

DIG_GAIN_ENABLE

Set to 1 to enable digital gain

0x13C[7:0]

DAC_DIG_GAIN[7:0]

LSB gain code

0x13D[3:0]

DAC_DIG_GAIN[11:8]

MSB gain code

DC Offset

The dc offset feature is used to individually offset the data into

the I or Q DAC. This feature can be used to cancel LO leakage.

The offset is programmed as a 16-bit twos complement number

in LSBs, plus a 5-bit twos complement number in 16ths of an LSB,

as shown in Table 63. DC offset is paged as described in the

DAC Paging section.

−215 ≤ LSBs Offset < 215

−16 ≤ Sixteenths Offset ≤ 15

where

LSBs Offset is the value of Register 0x136 and Register 0x137.

Sixteenths Offset is the value of Register 0x13A.

Table 63. DC Offset Registers

Bit Name

Description

0x135[0]

DC_OFFSET_ON

Set to 1 to enable dc offset

0x136[7:0]

LSB_OFFSET[7:0]

LSB dc offset code

0x137[7:0]

LSB_OFFSET[15:8]

MSB dc offset code

0x13A[4:0]

SIXTEENTH_OFFSET

Sub-LSB dc offset code

Group Delay

Group delay can be used to delay the I or Q channels. This can

be useful, for example, for DPD loop delay adjustment.

−4 ≤ DAC Clock Cycles ≤ 3.5

Group Delay = (DAC Clock Cycles × 2) + 8

where Group Delay is a 4-bit twos complement number.

Write the GroupDelay to the GROUP_DLY register

(Register 0x014[3:0]). This feature is paged as described in the

DAC Paging section.

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