GS3590 datasheet(84/118 Pages) SEMTECH

84 / 118 page

GS3590

Final Data Sheet Rev.4



PDS-061414 September 2017

84 of 118

Semtech

Proprietary & Confidential

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GPIO1_CFG

RSVD

15:9

R/W

Reserved—do not modify.

CFG_GPIO1_OUTPUT_



ENA

8R/W

GPIO1 buffer mode control.

See GPIO0_CFG:

CFG_GPIO0_OUTPUT_ENA parameter

for description and available settings.

Default mode: Output

CFG_GPIO1_FUNCTION

7:0

R/W

Function select for GPIO1 pin.

See GPIO0_CFG:

CFG_GPIO0_FUNCTION parameter for

description and available settings.

Default Function: 0x02 = PLL lock status

GPIO2_CFG

RSVD

15:9

R/W

Reserved—do not modify.

CFG_GPIO2_OUTPUT_



ENA

8R/W

GPIO2 buffer mode control.

See GPIO0_CFG:

CFG_GPIO0_OUTPUT_ENA parameter

for description and available settings.

Default mode: Input

CFG_GPIO2_FUNCTION

7:0

R/W

Function select for GPIO2 pin.

See GPIO0_CFG:

CFG_GPIO0_FUNCTION parameter for

description and available settings.

Default Function: 0x86 = Sleep control

GPIO3_CFG

RSVD

15:9

R/W

Reserved—do not modify.

CFG_GPIO3_OUTPUT_



ENA

8R/W

GPIO3 buffer mode control.

See GPIO0_CFG:

CFG_GPIO0_OUTPUT_ENA parameter

for description and available settings.

Default mode: Input

CFG_GPIO3_FUNCTION

7:0

R/W

Function select for GPIO3 pin.

See GPIO0_CFG:

CFG_GPIO0_FUNCTION parameter for

description and available settings.

Default Function: 0x87 = Cable

Equalizer/Driver mode selection

Table 5-3: Control Register Descriptions (Continued)

Addressh

Name

Parameter Name

Bit

Slice

R/W

Reset

Valueh

Description

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