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CPU
PRELIMINARY V1.8
5
Figure 2.
SS1102C Pinout
5.
CPU
• High performance CMOS 8-bit CPU with the industry standard 80C51 instruction
set.
• Extensive boolean processing (single bit logic) capabilities
• Arithmetic: 8 bit including multiply and divide
• Jumps, 8/16 bit address, conditional and unconditional
• Logical separation of program and data memory
• Six addressing modes
• Maximum operating speed 24MHz.
6.
Memory organization
6.1.
Data memory
The SS1102C has separate address space for Program Memory and Data Memory.
The SS1102C has 512 bytes of onchip data space, 256 bytes must be accessed by
MOVX.
P0.2
P0.1
P0.0
P2.7
P2.6
P2.5
P2.4
P2.3
P2.2
P2.1
P2.0
NRESET
XSIN
XSOUT
XFIN
XFOUT
VDD
AVDD
AVSS
BXFOUT
P4.0/RFPWR
P4.1/PLLSW
P4.2/LOCK
P4.3
TST
1
2
13
14 15
25
26
27
28
38
39
40
41
12
51
52
5
6
19
20
18
32
7
33
34
44
45
46
Index Corner
52-PIN PQFP
P4.4
SS1102C
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