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Port Definitions
82
PRELIMINARY V1.8
TABLE 56.
Definition of P3RD
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
P3RD7
P3RD6
P3RD5
P3RD4
P3RD3
P3RD2
P3RD1
P3RD0
Definition
Port-3
Resistor
Disable
Register
bit-7
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-6
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-5
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-4
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-3
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-2
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-1
0: Resistor
Enable
1: Disable
Port-3
Resistor
Disable
Register
bit-0
0: Resistor
Enable
1: Disable
Reset Value
0
0
0
0
0
0
0
0
Read/Write
by Software
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
by Hardware
Address
ABH
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
P3NOPN7 P3NOPN6 P3NOPN5 P3NOPN4 P3NOPN3 P3NOPN2 P3NOPN1 P3NOPN0
Definition
Port-3
Output
Buffer
bit-7
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-6
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-5
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-4
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-3
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-2
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-1
0: CMOS
Push_Pull
1: N-ch
open drain
Port-3
Output
Buffer
bit-0
0: CMOS
Push_Pull
1: N-ch
open drain
Reset Value
0
0
0
0
0
0
0
0
Read/Write
by Software
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
by Hardware
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