90 / 129 page  Port Definitions PRELIMINARY V1.8 85 TABLE 58. Definition of P4 TABLE 59. Definition of P4IO Write by Hardware Address EAH Bit Addr. None BIT 7 6 5 4 3 2 1 0 NAME P4IO7 P4IO6 P4IO5 P4IO4 P4IO3 P4IO2 P4IO1 P4IO0 Definition Port-4 I/O Control Register bit-7 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-6 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-5 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-4 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-3 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-2 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-1 0: Input Mode 1: Output Mode Port-4 I/O Control Register bit-0 0: Input Mode 1: Output Mode Reset Value 0 0 0 0 0 0 0 0 Read/Write by Software R/W R/W R/W R/W R/W R/W R/W R/W Write by Hardware Address EBH Bit Addr. None BIT 7 6 5 4 3 2 1 0 NAME P4RD7 P4RD6 P4RD5 P4RD4 P4RD3 P4RD2 P4RD1 P4RD0 Definition Port-4 Resistor Disable Register bit-7 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-6 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-5 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-4 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-3 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-2 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-1 0: Resistor Enable 1: Disable Port-4 Resistor Disable Register bit-0 0: Resistor Enable 1: Disable Reset Value 0 0 0 0 0 0 0 0 |
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