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Port Definitions
72
PRELIMINARY V1.8
TABLE 43.
Definition of P0IO
TABLE 44.
Definition of P0RD
Address
ABH
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
P0RD7
P0RD6
P0RD5
P0RD4
P0RD3
P0RD2
P0RD1
P0RD0
Definition
Port-0
Resistor
Disable
Register
bit-7
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-6
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-5
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-4
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-3
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-2
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-1
0: Resistor
Enable
1: Disable
Port-0
Resistor
Disable
Register
bit-0
0: Resistor
Enable
1: Disable
Reset Value
0
0
0
0
0
0
0
0
Read/Write
by Software
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
by Hardware
Address
ABH
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
P0NOPN7 P0NOPN6 P0NOPN5 P0NOPN4 P0NOPN3 P0NOPN2 P0NOPN1 P0NOPN0
Definition
Port-0
Output
Buffer
bit-7
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-6
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-5
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-4
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-3
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-2
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-1
0: CMOS
Push_Pull
1: N-ch
open drain
Port-0
Output
Buffer
bit-0
0: CMOS
Push_Pull
1: N-ch
open drain
Reset Value
0
0
0
0
0
0
0
0
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