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WatchDog Timer
26
PRELIMINARY V1.8
because of noise, the WD-Timer will make the CPU wake up. By enabling the
WatchDog Reset, this feature will be active. By disabling the WatchDog Reset and
enabling the WatchDog Interrupt, the WD-Timer can be used as a basic interval timer.
Only Fsys/12 is supported when under SlowAll or SlowPeri modes.
Figure 9.
Watch Dog Timer
10.2.
WatchDog Timer Control Register (WDCR)
Address
Bit Addr.
BIT
7
6
5
4
3
2
1
0
NAME
WDON1
WDON0
WDREN1
WDREN0
WDRST
WDCS1
WDCS0
Definition
WD-timer
turn ON
bit-1
WD-timer
turn ON
bit-0
WD-timer
Reset
generation
ENable
bit-1
WD-timer
Reset
generation
ENable
bit-0
WD-timer
Reset
STatus
Reserved
WD-timer
counting
Clock
Select
bit-1
WD-timer
counting
Clock
Select
bit-0
Fsys/12
Ffast/25
Ffast/210
Ffast/214
MUX
WDON
WDREN WDR ST
WDCS
[7:6]
[5:4]
[3]
[1:0]
WDCNT
8-bit DownCounter
data bus
set
WD Reset
WDINT
ena
ena
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