Port Definitions
PRELIMINARY V1.8
83
TABLE 57.
Definition of P3NOPN
14.10. Port-4
During External Memory Mode, P4.2 to P4.3 are used as ALE, and PSEN.
When External Memory Mode = 0, the Port-4(P4) is a 8-bit bidirectional port that can
be used as special output pins (P4.0/RFPWR, P4.1/PLLSW, P4.2/LOCK).
The direction of Port-4 can be decided bit-by-bit. If P4LATIN(PCR bit-5) = 0, CPU
reads pin status. If P4LATIN(PCR bit-5) = 1, CPU reads port latch rather than pin.
To use Pin-4.x as a normal input port, P4IOx should be low. The direction of each Port-
4 pin is decided by each P4IO bit. If the P4IO bit-x is high, Port-4.x is output mode. If
low, Port-4.x is input mode. Initial status is input mode because P4IO (Port-4 I/O
Direction Register) is reset to 00000000B. In input mode, pull-up resistor can be
connected by P4RD (Port-4 Resistor Disable Register). If the P4RD bit-x is high, Port-
4.x pull-up resistor is disconnected. If low, Port-4.x pull-up resistor is connected. Initial
status of P4RD is 00000000B, thus pull-up resistor is connected. If HIZ bit in the PSCR
(Power Saving Control Register) becomes high, pull-up resistor is disconnected and pin
status becomes high impedance.
To use Pin-4.x as a normal output port, P4IOx should be high. If the P4IO bit-x is high,
Port-4.x is output mode. In output mode, pull-up resistor is not automatically
disconnected regardless P4RD bit-x. If HIZ bit in the PSCR (Power Saving Control
Register) becomes high, pin status becomes high impedance.
To use P4.0/RFPWR, P4.1/PLLSW, P4.2/LOCK as a special output port the output
should be enabled in register SSTMCR of the SSTM block.
When P4NOPNx = 0, Port-4.x output buffer will be CMOS Push-Pull. But, P4NOPNx
= 1, Port4.x output buffer will become N-channel Open Drain.
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