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Port Definitions
76
PRELIMINARY V1.8
TABLE 48.
Definition of P2RD
TABLE 49.
Definition of P2NOPN
14.8.
P1 (Port-1)
The Pin-1.4 to 1.7 has two functional modes, special output Mode (SPIO, SPICLK) and
Port Mode (Bi-directional Port Mode). Initial Status of PCR1 (Port Control Register
Bit-1) is 0 (low). The PCR1 must be set to high for any case. In Port Mode, the direction
of Port-1 can be decided bit-by-bit. The read policy in Port Mode follows that described
before. Read-Modify-Write instructions read the port latch than the pin.
To use Pin-1.0 to 1.7 as a normal input port, PCR1 should be high. If PCR1 is high, the
direction of each Port-1 pin is decided by each P1IO bit. If the P1IO bit-x is high, Port-
1.x is output mode. If low, Port-1.x is input mode. Initial status is input mode because
P1IO (Port-1 I/O Direction Register) is reset to 00000000B. In input mode, pull-up
resistor can be connected by P1RD (Port-1 Resistor Disable Register). If the P1RD bit-x
Reset Value
0
0
0
0
0
0
0
0
Read/Write
by Software
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
by Hardware
Address
C9H
Bit Addr.
None
BIT
7
6
5
4
3
2
1
0
NAME
P2NOPN7 P2NOPN6 P2NOPN5 P2NOPN4 P2NOPN3 P2NOPN2 P2NOPN1 P2NOPN0
Definition
Port-2
Output
Buffer
bit-7
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-6
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-5
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-4
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-3
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-2
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-1
0: CMOS
Push_Pull
1: N-ch
open drain
Port-2
Output
Buffer
bit-0
0: CMOS
Push_Pull
1: N-ch
open drain
Reset Value
0
0
0
0
0
0
0
0
Read/Write
by Software
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Write
by Hardware
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