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TMS320F Datasheet(PDF) 128 Page - Texas Instruments

Part # TMS320F
Description  CPU and Instruction Set
PDF  389 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS320F Datasheet(HTML) 128 Page - Texas Instruments

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ADDS
Add to Accumulator With Sign Extension Suppressed
7-28
Syntax
ADDS
dma
Direct addressing
ADDS
ind [, ARn]
Indirect addressing
Operands
dma:
7 LSBs of the data-memory address
n:
Value from 0 to 7 designating the next auxiliary register
ind:
Select one of the following seven options:
*
*+
*–
*0+
*0–
*BR0+
*BR0–
ADDS
dma
15
14
13
12
11
10
987
6543
210
0
1
1
0
0
0
1
0
0
dma
ADDS
ind [, ARn]
15
14
13
12
11
10
987
6543
210
0
1
1
0
0
0
1
0
1
ARU
N
NAR
Note:
ARU, N, and NAR are defined in section 6.3,
Indirect Addressing Mode (page 6-9).
Execution
Increment PC, then ...
(ACC) + (data-memory address)
→ ACC
Status Bits
Affected by
Affects
OVM
C and OV
This instruction is not affected by SXM.
Description
The contents of the specified data-memory location are added to the accumu-
lator with sign extension suppressed. The data is treated as an unsigned 16-bit
number, regardless of SXM. The accumulator contents are treated as a signed
number. Note that ADDS produces the same results as an ADD instruction
with SXM = 0 and a shift count of 0.
The carry bit is set (C = 1) if the result of the addition generates a carry and
is cleared (C = 0) if it does not generate a carry.
Words
1
Cycles for a Single ADDS Instruction
Program
Operand
ROM
DARAM
SARAM
External
DARAM
1
1
1
1+p
SARAM
1
1
1, 2†
1+p
External
1+d
1+d
1+d
2+d+p
† If the operand and the code are in the same SARAM block
Opcode
Cycles



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