TMS320F datasheet(134/389 Pages) TI

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AND

AND With Accumulator

7-34

Status Bits

None

This instruction is not affected by SXM.

Description

If direct or indirect addressing is used, the low word of the accumulator is

ANDed with a data-memory value, and the result is placed in the low word posi-

tion in the accumulator. The high word of the accumulator is zeroed. If immedi-

ate addressing is used, the long-immediate constant can be shifted. During the

shift, low-order and high-order bits not filled by the shifted value are zeroed.

The resulting value is ANDed with the accumulator contents.

Words

Addressing mode

Direct or indirect

Long immediate

Cycles for a Single AND Instruction (Using Direct and Indirect Addressing)

Program

Operand

ROM

DARAM

SARAM

External

DARAM

1+p

SARAM

1, 2†

1+p

External

1+d

2+d+p

† If the operand and the code are in the same SARAM block

Cycles for a Repeat (RPT) Execution of an AND Instruction (Using Direct

and Indirect Addressing)

Program

Operand

ROM

DARAM

SARAM

External

DARAM

n+p

SARAM

n, n+1†

n+p

External

n+nd

n+1+p+nd

† If the operand and the code are in the same SARAM block

Cycles for a Single AND Instruction (Using Long Immediate Addressing)

ROM

DARAM

SARAM

External

2+2p

Cycles

TMS320F Datasheet(PDF) 134 Page - Texas Instruments

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