TMS320F datasheet(138/389 Pages) TI

138 / 389 page

Branch Unconditionally

7-38

Syntax

pma [, ind [, ARn] ]

Indirect addressing

Operands

pma:

16-bit program-memory address

Value from 0 to 7 designating the next auxiliary register

ind:

Select one of the following seven options:

*–

*0+

*0–

*BR0+

*BR0–

pma [, ind [, ARn] ]

987

6543

210

ARU

NAR

pma

Note:

ARU, N, and NAR are defined in section 6.3,

Indirect Addressing Mode (page 6-9).

Execution

pma

→ PC

Modify (current AR) and (ARP) as specified.

Status Bits

None

Description

The current auxiliary register and ARP contents are modified as specified, and

control is passed to the designated program-memory address (pma). The pma

can be either a symbolic or numeric address.

Words

Cycles for a Single B Instruction

ROM

DARAM

SARAM

External

4+4p

Note:

When this instruction reaches the execute phase of the pipeline, two additional instruc-

tion words have entered the pipeline. When the PC discontinuity is taken, these two

instruction words are discarded.

Example

191,*+,AR1

The value 191 is loaded into the program counter, and the program continues

to execute from that location. The current auxiliary register is incremented by

1, and ARP is set to point to auxiliary register 1 (AR1).

Opcode

Cycles

TMS320F Datasheet(PDF) 138 Page - Texas Instruments

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