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VT8235 Datasheet(PDF) 110 Page - VIA Technologies, Inc. |
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VT8235 Datasheet(HTML) 110 Page - VIA Technologies, Inc. |
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110 / 145 page ![]() VT8235 V-Link South Bridge Revision 1.22 October 24, 2002 -104- Device 17 Function 5 Audio Controller Registers UrpuytvrÃDp XrÃ8rp I/O Offset x2 – DXS Left Channel x Volume (3Fh)........RW I/O Offset x3 – DXS Right Channel x Volume (3Fh) .....RW 7-6 Reserved (Do Not Program) ............always write 0’s 5-0 Volume Control 000000 0 db … … 000111 -10.5 db … … 011111 -46.5 db … … 111111 Muted (instead of -94.5 db) .............. default I/O Offset x7-x4 – DXS Chan x SGD Table Ptr Base.....RW 31-0 SGD Table Pointer Base Address (even addr).... W Current Pointer Address ........................................R I/O Offset xB-x8 – StopIndex / DataType / SampleRate RW 31-24 SGD Stop Index Setting ....................... default = FFh 23-22 Reserved ........................................ always reads 0 21-20 PCM Format Selects the format used by the controller to process the incoming sample. 00 8-bit Mono............................................. default 01 8-bit Stereo 10 16-bit Mono 11 16-bit Stereo 19-0 Sample Rate .........................default = FFFFFh (48K) This field allows the sample rate converter to know the sample rate of an incoming sample so the converter can properly convert the sample into the required 48 KHz sample output. Program as (2 20 / 48.000) * Sample Rate I/O Offset xF-xC – DXS Chan x SGD Current Count.... RO 31-24 Current SGD Index This field reports the index the SGD engine is currently processing. 23-0 Current SGD Count This field reports the count remaining in the current entry being processed. For example, if 10 bytes of a 30-byte count have been transferred, this field would read 20 to indicate 20 bytes remaining. Audio SGD Table Format 63 62 61-56 55-32 31-0 EOL FLAG -reserved- Base Base Count Address [23:0] [31:0] EOL End Of Link. 1 indicates this block is the last of the link. If the channel “Interrupt on EOL” bit is set, then an interrupt is generated at the end of the transfer. FLAG Block Flag. If set, transfer pauses at the end of this block. If the channel “Interrupt on FLAG” bit is set, then an interrupt is generated at the end of this block. |
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