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PM7346 Datasheet(PDF) 262 Page - PMC-Sierra, Inc |
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PM7346 Datasheet(HTML) 262 Page - PMC-Sierra, Inc |
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262 / 419 page ![]() PM7346 S/UNI-QJET DATASHEET PMC-960835 ISSUE 6 SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 241 Register 080H, 180H, 280H, 380H: TXCP-50 Configuration 1 Bit Type Function Default Bit 7 R/W TPTYP 0 Bit 6 R/W TCALEVEL0 0 Bit 5 R/W HSCR 0 Bit 4 R/W HCSDQDB 0 Bit 3 R/W HCSB 0 Bit 2 R/W HCSADD 1 Bit 1 R/W DSCR 0 Bit 0 R/W FIFORST 0 FIFORST: The FIFORST bit is used to reset the four cell transmit FIFO. When FIFORST is set to logic zero, the FIFO operates normally. When FIFORST is set to logic one, the FIFO is immediately emptied and ignores writes. The FIFO remains empty and continues to ignore writes until a logic zero is written to FIFORST. Null/unassigned cells are transmitted until a subsequent cell is written to the FIFO. See section 12.8 on resetting the receive and transmit FIFOs. DSCR: The DSCR bit controls the scrambling of the cell payload. When DSCR is a logic one, cell payload scrambling is disabled. When DSCR is a logic zero, payload scrambling is enabled. In the case where HSCR is logic one, the payload will be scrambled (along with the header) regardless of the setting of the DSCR bit. HCSADD: The HCSADD bit controls the addition of the coset polynomial, x6+x4+x2+1, to the HCS octet prior to insertion in the synchronous payload envelope. When HCSADD is a logic one, the polynomial is added, and the resulting HCS is inserted. When HCSADD is a logic zero, the polynomial is not added, and the unmodified HCS is inserted. HCSADD takes effect unconditionally regardless of whether a null/unassigned cell is being transmitted or whether the HCS octet has been read from the FIFO. |
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