PM7346 datasheet(156/419 Pages) PMC

156 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 135

Bit

Type

Function

Default

Bit 7

PERR[15]

Bit 6

PERR[14]

Bit 5

PERR[13]

Bit 4

PERR[12]

Bit 3

PERR[11]

Bit 2

PERR[10]

Bit 1

PERR[9]

Bit 0

PERR[8]

PERR[15:0]:

PERR[15:0] represents the number of DS3 P-bit errors, the number of E3

G.832 BIP-8 errors or the number of J2 CRC-5 errors that have been

detected since the last time the parity error counter was polled.

The counter (and all other counters in the PMON) is polled by writing to any

of the PMON register addresses (x14H to x1FH) or to the S/UNI-QJET

Identification, Master Reset, and Global Monitor Update register (006H).

Such a write transfers the internally accumulated count to the PERR Error

Count Registers and simultaneously resets the internal counter to begin a

new cycle of error accumulation. This transfer and reset is carried out in a

manner that coincident events are not lost. The transfer takes 255 RCLK[x]

cycles to complete in DS3 mode and 3 RCLK[x] cycles to complete in E3 and

J2 mode.

This counter is paused when the corresponding framer has lost frame

alignment.

PM7346 Datasheet(PDF) 156 Page - PMC-Sierra, Inc