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PM7346 Datasheet(PDF) 158 Page - PMC-Sierra, Inc |
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PM7346 Datasheet(HTML) 158 Page - PMC-Sierra, Inc |
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158 / 419 page ![]() PM7346 S/UNI-QJET DATASHEET PMC-960835 ISSUE 6 SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 137 Register 01DH, 11DH, 21DH, 31DH: PMON Path Parity Error Event Count MSB Bit Type Function Default Bit 7 Unused X Bit 6 Unused X Bit 5 R CPERR[13] X Bit 4 R CPERR[12] X Bit 3 R CPERR[11] X Bit 2 R CPERR[10] X Bit 1 R CPERR[9] X Bit 0 R CPERR[8] X CPERR[13:0]: When configured for DS3 applications, CPERR[13:0] represents the number of DS3 path parity errors that have been detected since the last time the DS3 path parity error counter was polled. This counter is forced to zero when the S/UNI-QJET is configured for either J2 and E3 applications. The counter (and all other counters in the PMON) is polled by writing to any of the PMON register addresses (x14H to x1FH) or to the S/UNI-QJET Identification, Master Reset, and Global Monitor Update register (006H). Such a write transfers the internally accumulated count to the CPERR Error Count Registers and simultaneously resets the internal counter to begin a new cycle of error accumulation. This transfer and reset is carried out in a manner that coincident events are not lost. The transfer takes 255 RCLK[x] cycles to complete. This counter is paused when the corresponding framer has lost frame alignment. |
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