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PM7346 Datasheet(PDF) 179 Page - PMC-Sierra, Inc |
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PM7346 Datasheet(HTML) 179 Page - PMC-Sierra, Inc |
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179 / 419 page ![]() PM7346 S/UNI-QJET DATASHEET PMC-960835 ISSUE 6 SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3 PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 158 Register 034H, 134H, 234H, 334H: DS3 TRAN Configuration Bit Type Function Default Bit 7 R/W CBTRAN 0 Bit 6 R/W AIS 0 Bit 5 R/W IDL 0 Bit 4 R/W FERF 0 Bit 3 R/W Reserved 0 Bit 2 Unused X Bit 1 Unused X Bit 0 R/W CBIT 0 CBIT: The CBIT bit enables the DS3 C-bit parity application. When CBIT is written with a logic 1, C-bit parity is enabled, and the S/UNI-QJET modifies the C-bits as required to include the path maintenance data link, the FEAC channel, the far end block error indication, and the path parity. When CBIT is written with a logic 0, the M23 application is selected, and each C-bit is set to logic 1 by the S/UNI-QJET except for the first C-bit of the frame, which is forced to toggle every frame. Note that the C-bits may be modified as required using the DS3 overhead access port (TOH) regardless of the setting of this bit. FERF: The FERF bit enables insertion of the far end receive failure maintenance signal in the DS3 stream. When FERF is written with a logic 1, the X1 and X2 overhead bit positions are set to logic 0. When FERF is written with a logic 0, the X1 and X2 overhead bit positions in the DS3 stream are set to logic 1. IDL: The IDL bit enables insertion of the idle maintenance signal in the DS3 stream. When IDL is written with a logic 1, the DS3 payload is overwritten with the repeating pattern 1100.... The DS3 overhead bit insertion (X, P, M F, and C) continues normally. When IDL is written with a logic 0, the idle signal is not inserted. |
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