PM7346 datasheet(190/419 Pages) PMC

190 / 419 page

PM7346 S/UNI-QJET

DATASHEET

PMC-960835

ISSUE 6

SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3

PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 169

logic 0, it indicates that no OOF state change has occurred since the last time

this register was read.

COFAI:

The COFAI bit indicates that a change of frame alignment between the

previous alignment and the newly found alignment has occurred. When

COFAI is logic 1, the last high-to-low transition on the OOF signal resulted in

the new frame alignment differing from the previous one. The COFAI bit is

cleared to logic 0 upon the completion of the register read. When COFAI is

logic 0, it indicates that no change in frame alignment has occurred when

OOF went low.

LCVI:

The LCVI bit indicates that a line code violation has occurred. When LCVI is

logic 1, a line code violation on the RPOS and RNEG inputs was detected

since the last time this register was read. The LCVI bit is cleared to logic 0

upon the completion of the register read. When LCVI is logic 0, it indicates

that no line code violation was detected since the last register read. When

the UNI bit in the Framing Options register is logic 1, the LCVI is forced to

logic 0.

LOSI:

The LOSI bit indicates that a state transition occurred on the LOS status

signal. When LOSI is logic 1, a high-to-low or low-to-high transition occurred

on the LOS status signal since the last time this register was read. The LOSI

bit is cleared to logic 0 upon the completion of the register read. When LOSI

is logic 0, it indicates that no state change has occurred on LOS since the

last time this register was read. When the UNI bit in the Framing Options

CZDI:

The CZDI bit indicates that four consecutive zeros in the HDB3-encoded

stream have been detected. CZDI is asserted to a logic 1, whenever the CZD

signal is asserted. The CZDI bit is cleared to a logic 0 upon the completion of

the register read. When CZDI is logic 0, it indicates that no occurrences of

four consecutive zeros was detected since the last register read. When the

UNI bit in the Framing Options register is logic 1, the CZDI indication is forced

to logic 0.

The interrupt indications within this register work independently from the interrupt

enable bits, allowing the microprocessor to poll the register to determine the

state of the framer. The indication bits (bits 2,3,4,5,6 of this register) are cleared

PM7346 Datasheet(PDF) 190 Page - PMC-Sierra, Inc

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