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TMPR3916 Datasheet(PDF) 121 Page - Toshiba Semiconductor |
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TMPR3916 Datasheet(HTML) 121 Page - Toshiba Semiconductor |
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121 / 225 page  Chapter 6 Direct Memory Access Controller (DMAC) Preliminary 6-8 Destination Address Register (DAR) Bit 31 24 23 0 Name DAL DAC Bit Name Function Reset Value R/W 31:24 DAL Base Address This part of the destination address will not count up. 0 R/W 23:0 DAC Address Offset This part of the destination address will count up on every write, when the DMA Controller transfers data from a peripheral device to the memory. 0 R/W Byte Count Register (BCR) Bit 31 24 23 0 Name BC Bit Name Function Reset Value R/W 31:24 Unused 0R 23:0 BC These bits contain the number of bytes left to transfer. The DMA Controller decrements the contents of this register after every transfer. 0 R/W |
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