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TMPR3916 Datasheet(PDF) 141 Page - Toshiba Semiconductor

Part # TMPR3916
Description  32-Bit TX System RISC TX39 Family TMPR3916
PDF  225 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3916 Datasheet(HTML) 141 Page - Toshiba Semiconductor

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Chapter 7 CAN Module (TXCAN)
Preliminary
7-20
The free running time stamp counter and the time stamp hold register will be cleared in the following
cases:
•
After reset (power-up reset or software reset)
•
When the module enters configuration mode
•
When the module enters sleep mode
•
When a write access to the time stamp prescale register is performed
7.2.9
Status Registers
Global Status Register (GSR)
Bit
1514
131211
10
9
8
Name
MsgInSlot
RM
TM
SUA
Bit
7
6
543
210
Name
CCE
SMA

TSO
BO
EP
EW
Bit
Name
Function
Reset
Value
Mode
15:12
Msg
InSlot
Message In Slot
1111 = No transmit message in slot
0000 = Message 0 is in the transmission slot
...
1110 = Message 14 is in the transmission slot
1111
R
11
RM
Receive Mode
1 = TXCAN is receiving a message. That means TXCAN is not the
transmitter of the message and the bus is not idle.
0 = The CAN module is not receiving a message
0
R
10
TM
Transmit Mode
1 = TXCAN is transmitting a message. The module stays transmitter
until the bus is idle or it loses arbitration.
0 = The CAN module is not transmitting a message
0
R
9
Wired to zero
0R
8
SUA
Suspend Mode Acknowledge
1 = TXCAN is in suspend mode
0 = TXCAN is not in suspend mode
0
R
7
CCE
Change Configuration Enable
1 = The MCU is allowed to do write accesses to the configuration
registers.
0 = Write accesses to the configuration registers are denied.
1
R
6
SMA
Sleep Mode Acknowledge
1 = TXCAN has entered the sleep mode.
0 = Normal operation
0
R
5
Wired to zero
0R
4
Wired to zero
0R
3
TSO
Time Stamp Overflow Flag
1 = There was at least one overflow of the time stamp counter since
this bit has been cleared. To clear this bit, clear the TSOIF bit in
the GIF register.
0 = There was no overflow of the time stamp counter
0
R



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