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LTC2984 Datasheet(PDF) 23 Page - Analog Devices |
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LTC2984 Datasheet(HTML) 23 Page - Analog Devices |
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23 / 78 page ![]() LTC2984 23 2984fb For more information www.linear.com/LTC2984 EEPROM OVERVIEW The LTC2984 contains 512 bytes of EEPROM, which shadowstheuppersensorconfigurationsegmentofUSER RAM(locations0x200–0x3CF,seeFigure4).Priortoinitial usage, the user programs the USER RAM with all channel assignment and custom sensor data. Once the USER RAM has been programmed, the user can save this segment of memory into the EEPROM. After subsequent power down orsleepcycles,theusercanreloadtheUSERRAMwiththis stored EEPROM data bypassing the channel assignment and customer sensor programming normally required. APPLICATIONS INFORMATION APPLICATIONS INFORMATION Figure 4. Shadow EEPROM Memory Map BYTE ADDRESS 0000 01FF 0200 03CF 03DO 03FF LTC2984 SPI ADDRESS SPACE USER COMMAND REGISTERS, RESULTS DATA, GLOBAL CONFIGURATION AND STATUS SENSOR CONFIGURATION MEMORY SEGMENT (CHANNEL ASSIGNMENT AND CUSTOM SENSOR DATA) COMMAND 21 (0x15) COMMAND 22 (0x16) EEPROM SHADOW RESERVED RESERVED* *NOTE: 03D0–03FF IS RESERVED AND IS NOT SHADOWED BY EEPROM 2984 F04 Figure 5. 2984 F05 WRITE EEPROM KEY TO LTC2984 CHECK EEPROM STATUS REGISTER DONE USER DEFINED EEPROM ERROR HANDLER SEND EEPROM WRITE COMMAND (COMMAND 21) WAIT FOR EEPROM COMMAND TO COMPLETE LTC2984 READY WRITE CHANNEL ASSIGNMENT AND CUSTOM SENSOR DATA TO LTC2984 ELSE PROGRAM FAILED STATUS BIT SET EEPROM WRITE OPERATION The EEPROM write operation requires 5 steps (see Figure 5). 1. Sensor-Configuration.Writealldesiredchannelassignment and custom sensor data to the LTC2984 USER RAM. 2. SetEEPROMKey.WritetheEEPROMKey(0xA53C0F5A) to the key register space of the LTC2984 USER RAM (Address range 0x0B0–0x0B3, see Tables 5, 7 and 11). Note the key is written MSB first. 3. SendEEPROMWriteCommand.WritetheEEPROMwrite command (0x15) and start bit (0x80) to the LTC2984 command register (Address 0x000). The command plus start bit is 0x80 + 0x15 = 0x95 (see Table 12). 4. Wait for EEPROM Command to Complete. Completion of the write operation is indicated by both the interrupt pin going HIGH and the status register START bit going LOW and DONE bit going HIGH. 5. Check EEPROM Status Register. Read EEPROM Status register (Address 0x0F9) and checks the Program-Failed status bit (Bit 2) to determine whether the EEPROM write operationwassuccessful(seeTable13).TheProgram-Failed status bit being set indicates that the write operation failed. Upon successful completion of steps 1–5, the EEPROM will now contain the image that was present in USER RAM locations 0x200–0x3CF. EEPROM READ/WRITE VALIDATION Access to the EEPROM is key-protected to prevent inad- vertent access. The EEPROM also has two levels of data integrity protection. The first level is implemented using an error correcting code (ECC) on each 32-bit word of data in the EEPROM. The ECC is capable of correcting any single bit error per word and detecting 2-bit errors per word. The second level of protection is implemented usinga 32-bitchecksum,whichcoverstheentirecontents of user EEPROM. Status bits are available to the user for reporting ECC status and checksum error conditions. |
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