LTC2984 datasheet(24/78 Pages) AD

24 / 78 page

LTC2984

2984fb

For more information www.linear.com/LTC2984

EEPROM READ OPERATION

The LTC2984 EEPROM read operation is comprised of

4 steps (see Figure 6)

APPLICATIONS INFORMATION

Figure 6. Read Operation

2984 F06

WRITE EEPROM KEY

TO LTC2984

CHECK EEPROM

READ RESULT

CODE

DONE

USER DEFINED

EEPROM

ERROR HANDLER

SEND EEPROM READ COMMAND

(COMMAND 22)

WAIT FOR EEPROM

COMMAND TO COMPLETE

LTC2984

READY

ELSE

PASS: READ

RESULT CODE == 0

Table 11. LTC2984 EEPROM Related Registers

ADDRESS

DESCRIPTION

0x0B0

EEPROM Key [3] (MSB) EEPROM Key byte 3 – Set to 0xA5

0x0B1

EEPROM Key [2]

EEPROM Key byte 2 – Set to 0x3C

0x0B2

EEPROM Key [1]

EEPROM Key byte 1 – Set to 0x0F

0x0B3

EEPROM Key [0] (LSB)

EEPROM Key byte 0 – Set to 0x5A

0x0D0

EEPROM Read

Result Code

This register indicates the Pass/Fail

status of the most recent EEPROM

read operation

0x00 = PASS

0xFF = FAIL

0x0F9

EEPROM Status

See LTC2984 EPROM Status

Table 12. LTC2984 EEPROM Related Commands and Status

B7 B6 B5 B4 B3 B2 B1 B0 DESCRIPTION

1 EEPROM Write Command –

Transfer the contents of user

memory locations 0x200–0x3CF

to the on-chip shadow EEPROM

0 EEPROM Read Command –

Transfer the contents of the on-

chip shadow EEPROM to user

memory locations 0x200–0x3CF

Table 13. EEPROM Status Bits

EEPROM STATUS BIT

DESCRIPTION

ECC Used

Error Correcting Code Used – This bit indicates

that ECC was used to correct data on one or more

locations during the EEPROM read process (Note 1)

ECC Failure

Error Correcting Code Failure – This bit indicates

that ECC failed to correct data on one or more

locations during the EEPROM read process. If this

bit is set one or more locations has invalid data

(Note 1)

Program Failure

Program Failure – This bit indicates that a write

data error occurred on one or more locations

during the EEPROM programming process

(Note 1)

Checksum Error

Checksum Error – This bit indicates that a

checksum error occurred during the EEPROM

read process (Note 1)

Note 1: Once bits in the EEPROM status register are set they will remain

set until cleared by the user. The EEPROM status register bits are cleared

by writing 0x00 to address 0x0F9. These bits are also cleared on reset and

after exiting sleep mode.

Table 14. LTC2984 EEPROM Status Register (Address 0x0F9)

–

Checksum

Error

Program

Failure

ECC

Failure

ECC

Used

1. SetEEPROMKey.WritetheEEPROMKey(0xA53C0F5A)

to the key register space of the LTC2984 USER RAM

(Address range 0x0B0–0x0B3, see Tables 5, 7 and 11).

Note the key is written MSB first.

2. SendEEPROMReadCommand.WritetheEEPROMread

command (0x16) and start bit (0x80) to the LTC2984

commandregister(Address0x000).Thecommandplus

start bit would be 0x80 + 0x16 = 0x96 (see Table 12).

3. Wait for EEPROM Command to Complete. Completion

of the read operation is indicated by both the interrupt

pin going HIGH and the status register START bit going

LOW and DONE bit going HIGH.

4. Check EEPROM Read Result Code. Read the EEPROM

read result code register address (0x0D0) to determine

the pass/fail status of the read operation. A value of zero

indicatesthatthecommandcompletedsuccessfullyand

a non-zero value indicates that an error has occurred.

Additional read operation status bits are also available

in the EEPROM Status Register (see Tables 13 and 14).

Upon successful completion of steps 1–4, USER RAM

locations 0x200–0x3CF will now contain the data that was

stored in the LTC2984’s shadow EEPROM.

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