TRF2443IPFPR datasheet(32/72 Pages) TI

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TRF2443

SLWS217A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com

Table 2. SPI Register Bank Addresses

NUMBER OF

ADDRESS

REGISTERS

EEPROM

TX PLL

RX PLL

TX/RX

Table 3. SPI Register Addresses

POWER-ON

SUGGESTED

NAME

DESCRIPTION

VALUE

ADDR <0>

ADDR <1>

For PLLs (SPI-1 and SPI-2):

Reg 0(000), Reg 1(001), Reg 2 (010), Reg 3 (011), Reg 4 (100),

ADDR <2>

Reg 5 (101)

For TX_RX (SPI-3):

Address bits

Reg 0 (000), Reg 1(001), Reg 2 (010), Reg 3 (011), Reg 4 (100),

Reg 5 (101), Reg 6(110), Reg 7(111)

(Note: In TX_RX (SPI-3), Reg 0 has special functionality as

described in the TX and RX SPI Registers section.)

ADDR <3>

ADDR <4>

TX PLL (01); RX PLL (10); TX_RX (11)

Data bit

(LSB)

Data bit

B10

Data bit

B11

Data bit

B12

Data bit

B13

Data bit

B14

Data bit

B15

Data bit

B16

Data bit

B17

Data bit

Data field

B19

Data bit

B20

Data bit

B21

Data bit

B22

Data bit

B23

Data bit

B24

Data bit

B25

Data bit

B26

Data bit

B27

Data bit

B28

Data bit

B29

Data bit

B30

Data bit

B31

(MSB)

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