TRF2443IPFPR datasheet(62/72 Pages) TI

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TX OUTPUT POWER RAMP-DOWN

LOOPBACK

TX Signal Loopback

TRF2443

SLWS217A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com

To avoid unwanted spurious emissions during power down of the transmitter, the power-down circuitry is

designed to ramp down the output power gradually. The ramp-down time constant is programmable.

PS_TC<1,0> (SPI-3, register 3, B<10,9>) allows selection of four different time constants.

PS_TC

POWER DOWN

µs

The values shown in the preceding table are the typical times required for the output level to be attenuated

by 30 dB.

The TRF2443 integrates a loopback switch between the TX and the RX chains. The switch connects the TX

modulator output to the RX IFVGA3 input. This path can be used for three different functions:

• Loopback path for the transmitted signal

• RX baseband low-pass-filter corner-frequency calibration

• TX modulator LO leakage calibration

The loopback mode is enabled by setting EN_LB (SPI-3, register 1, B<18>) to 1. When the switch is activated,

the TX amplifier, RX LNA, RX IFVGA1, and RX IFVGA2 are all turned off automatically.

The loopback path can be programmed with two different insertion losses:

• 20-dB insertion loss for the loopback path of the transmitted signal

• Minimum insertion loss for calibration mode

The attenuation mode is selected via EN_LB_ATT (SPI-3, register 1, B<19>).

EN_LB_ATT = 1

→ 20-dB attenuation

EN_LB_ATT = 0

→ minimum insertion loss

The TRF2443 internal feedback path can be used to loop back the TX signal(1), which enables the RX chain to

be used to monitor the transmitted signal. This mode is controlled via the serial programming interface (SPI)

according the following possible steps:

1. Enable loopback switch with 20-dB attenuation

EN_LB_ATT = 1 (SPI-3, register 1, B<19>)

EN_LB = 1 (SPI-3, register 1, B<18>)

2. Program TXLO to 165 MHz (TXLO to 2640 MHz and TX divider to 16)

TXRDIV<13,0> = <00 0000 0000 0001> (SPI-1, register 1, B<18,5>) [R = 1]

TX_NINT<15,0> = <0000 0000 0100 0010> (SPI-1, register 2, B<20,5>) [N = 66]

TXDIV_SEL = 0 (SPI-1, register 2, B<26>) [LO divider set to 16]

3. Program RXLO to 165 MHz (RXLO to 2640 MHz and RX divider to 16)

RXRDIV<13,0> = <00 0000 0000 0001> (SPI-2, register 1, B<18,5>) [R = 1]

RX_NINT<15,0> = <0000 0000 1000 0100> (SPI-2, register 2, B<20,5>) [N = 132]

RXDIV_SEL = 0 (SPI-2, register 2, B<26>) [LO divider set to 16]

4. Set receiver baseband gain to 10 dB

RXBB_GAIN<4,0> = <00001> (SPI-3, register 2, B<15,11>)

5. Program the receiver baseband-filter cutoff frequency to the appropriate value (depending on the TX signal

bandwidth).

(1)

For a TX loopback frequency of 165 MHz, the PLLs are locked to a 20-MHz PFD frequency.

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