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TRF2443IPFPR Datasheet(PDF) 42 Page - Texas Instruments

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Part # TRF2443IPFPR
Description  Integrated IF Transceiver for Broadband Wireless Applications
PDF  72 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TRF2443IPFPR Datasheet(HTML) 42 Page - Texas Instruments

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TRF2443
SLWS217A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009 ................................................................................................................................... www.ti.com
SPI3 Register 1
TX
TX I and Q phase
Register address
SPI address
TX VGA attenuation control
PWD
unbalance correction
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Bit8
Bit9
Bit10
Bit11
Bit12
Bit13
Bit14
Bit15
TX I and ...
Enable
Loopback
Detect
PD ref
RSV
correction
loopback
attenuator
reset
Bit16
Bit17
Bit18
Bit19
Bit20
Bit21
Bit22
Bit23
Bit24
Bit25
Bit26
Bit27
Bit28
Bit29
Bit30
Bit31
REGISTER
POWER-ON
SUGGESTED
NAME
DESCRIPTION
1
VALUE
VALUE
Bit0
ADDR_0
1
1
Register address bits
Bit1
ADDR_1
0
0
Bit2
ADDR_2
0
0
Bit3
ADDR_3
1
1
SPI address bits
Bit4
ADDR_4
1
1
Bit5
PWD_TX
1
0
TX chain power down (1 = TX chain is off)
Bit6
TX_ATT_0
0
App. specific
TX chain variable-attenuator control;
000 0000 = minimum attenuation;
Bit7
TX_ATT_1
0
App. specific
100 0111 = maximum attenuation (35.5 dB);
Bit8
TX_ATT_2
0
App. specific
attenuation step = 0.5 dB;
Bit9
TX_ATT_3
1
App. specific
Bit10
TX_ATT_4
0
App. specific
Bit11
TX_ATT_5
0
App. specific
Bit12
TX_ATT_6
0
App. specific
Bit13
TXIQ_PHASE_0
0
0
TX LO I and Q phase-error correction bits. Suggested value is
(0 1000).
Bit14
TXIQ_PHASE_1
0
0
Bit15
TXIQ_PHASE_2
0
0
Bit16
TXIQ_PHASE_3
0
1
Bit17
TXIQ_PHASE_4
1
0
Bit18
EN_LB
0
0
Enable loopback switch (1 = enable)
Bit19
EN_LB_ATT
0
0
Enable 20-dB attenuator in loopback (1 = enable)
Bit20
DET_RESET
0
0
Software reset of power-detect alarm output
Bit21
PD_REF_BUF
0
0
Power down reference-frequency input buffer (1 = disable)
Bit22
RSV
0
0
Reserved
Bit23
RSV
0
0
Reserved
Bit24
RSV
0
0
Reserved
Bit25
RSV
0
0
Reserved
Bit26
RSV
0
0
Reserved
Bit27
RSV
0
0
Reserved
Bit28
RSV
0
0
Reserved
Bit29
RSV
0
0
Reserved
Bit30
RSV
0
0
Reserved
Bit31
RSV
0
0
Reserved
PWD_TX (bit 5): When 1, the entire TX chain is off.
TX_ATT<6,0>: TX chain variable-attenuator control bits, 000 0000 corresponds to minimum attenuation
(maximum gain), and 100 0111 sets the attenuator to maximum (minimum gain). The typical attenuation step is
0.5 dB.
TXIQ_PHASE<4,0>: TX I-Q phase unbalance correction bits. These bits allow correcting ±2 degrees of phase
unbalance between the I and Q paths. Suggested value to program = 0 1000.
42
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TRF2443



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