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82G33 Datasheet(PDF) 235 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 235 Page - Intel Corporation

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Direct Memory Interface (DMI) Registers
Datasheet
235
7.1.4
DMIPVCCTL—DMI Port VC Control
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
0C–0Dh
Default Value:
0000h
Access:
RO, RW
Size:
16 bits
Bit
Access &
Default
Description
15:4
RO
000h
Reserved
3:1
RW
000b
VC Arbitration Select (VCAS): This field will be programmed by
software to the only possible value as indicated in the VC Arbitration
Capability field.
See the PCI express specification for more details.
0
RO
0b
Reserved
7.1.5
DMIVC0RCAP—DMI VC0 Resource Capability
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
10–13h
Default Value:
00000001h
Access:
RO
Size:
32 bits
Bit
Access &
Default
Description
31:16
RO
00000h
Reserved
15
RO
0b
Reject Snoop Transactions (REJSNPT):
0 = Transactions with or without the No Snoop bit set within the TLP
header are allowed on this VC.
1 = Any transaction without the No Snoop bit set within the TLP
header will be rejected as an Unsupported Request.
14:8
RO
00h
Reserved
7:0
RO
01h
Port Arbitration Capability (PAC): Having only bit 0 set indicates
that the only supported arbitration scheme for this VC is non-
configurable hardware-fixed.



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