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82G33 Datasheet(PDF) 237 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 237 Page - Intel Corporation

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Direct Memory Interface (DMI) Registers
Datasheet
237
7.1.7
DMIVC0RSTS—DMI VC0 Resource Status
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
1A–1Bh
Default Value:
0002h
Access:
RO
Size:
16 bits
This register reports the Virtual Channel specific status.
Bit
Access &
Default
Description
15:2
RO
0000h
Reserved.
1
RO
1b
Virtual Channel 0 Negotiation Pending (VC0NP): This bit
indicates the status of the process of Flow Control initialization. It is
set by default on Reset, as well as whenever the corresponding Virtual
Channel is Disabled or the Link is in the DL_Down state.
It is cleared when the link successfully exits the FC_INIT2 state.
0 = The VC negotiation is complete.
1 = The VC resource is still in the process of negotiation (initialization
or disabling).
BIOS Requirement: Before using a Virtual Channel, software must
check whether the VC Negotiation Pending fields for that Virtual
Channel are cleared in both Components on a Link.
0
RO
0b
Reserved
7.1.8
DMIVC1RCAP—DMI VC1 Resource Capability
B/D/F/Type:
0/0/0/DMIBAR
Address Offset:
1C–1Fh
Default Value:
00008001h
Access:
RO
Size:
32 bits
Bit
Access &
Default
Description
31:16
RO
00000h
Reserved
15
RO
1b
Reject Snoop Transactions (REJSNPT):
0 = Transactions with or without the No Snoop bit set within the TLP
header are allowed on this VC.
1 = Any transaction without the No Snoop bit set within the TLP
header will be rejected as an Unsupported Request.
14:8
RO
00h
Reserved
7:0
RO
01h
Port Arbitration Capability (PAC): Having only bit 0 set indicates
that the only supported arbitration scheme for this VC is non-
configurable hardware-fixed.



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