| Electronic Components Datasheet Search |
|
82G33 Datasheet(PDF) 241 Page - Intel Corporation |
|
|
|||||||||||||||||||||||||||||
82G33 Datasheet(HTML) 241 Page - Intel Corporation |
|
241 / 437 page ![]() Direct Memory Interface (DMI) Registers Datasheet 241 7.1.13 DMILSTS—DMI Link Status B/D/F/Type: 0/0/0/DMIBAR Address Offset: 8A–8Bh Default Value: 0001h Access: RO Size: 16 bits This register indicates DMI status. Bit Access & Default Description 15:10 RO 00h Reserved and Zero for future R/WC/S implementations. Software must use 0 for writes to these bits. 9:4 RO 00h Negotiated Width (NWID): This field indicates negotiated link width. This field is valid only when the link is in the L0, L0s, or L1 states (after link width negotiation is successfully completed). 04h = X4 All other encodings are reserved. 3:0 RO 1h Negotiated Speed (NSPD): This field indicates negotiated link speed. 1h = 2.5 Gb/s All other encodings are reserved. § |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |