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82G33 Datasheet(PDF) 242 Page - Intel Corporation |
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82G33 Datasheet(HTML) 242 Page - Intel Corporation |
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242 / 437 page ![]() Integrated Graphics Device Registers (D2:F0,F1) (Intel® 82Q35, 82Q33, 82G33 GMCH Only) 242 Datasheet 8 Integrated Graphics Device Registers (D2:F0,F1) (Intel® 82Q35, 82Q33, 82G33 GMCH Only) The Integrated Graphics Device (IGD) registers are located in Device 2 (D0), Function 0 (F0) and Function 1 (F1). This chapter provides the descriptions for these registers. Section 8.1 provides the register descriptions for Device 2, Function 0. Section 8.2 provides the register descriptions for Device 2, Function 1. 8.1 Integrated Graphics Register Details (D2:F0) Device 2, Function 0 contains registers for the internal graphics functions. Table 8-1 lists the PCI configuration registers in order of ascending offset address. Function 0 can be VGA compatible or not, this is selected through bit 1 of GGC register (Device 0, offset 52h). Note: The following sections describe Device 2 PCI configuration registers only. Table 8-1. Integrated Graphics Device Register Address Map (D2:F0) Address Offset Register Symbol Register Name Default Value Access 00–01h VID2 Vendor Identification 8086h RO 02–03h DID Device Identification 29C2h RO 04–05h PCICMD2 PCI Command 0000h RO, RW 06–07h PCISTS2 PCI Status 0090h RO 08h RID2 Revision Identification 00h RO 09–0Bh CC Class Code 030000h RO 0Ch CLS Cache Line Size 00h RO 0Dh MLT2 Master Latency Timer 00h RO 0Eh HDR2 Header Type 80h RO 10–13h MMADR Memory Mapped Range Address 00000000h RO, RW 2C–2Dh SVID2 Subsystem Vendor Identification 0000h RWO 2E–2Fh SID2 Subsystem Identification 0000h RWO |
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