82G33 datasheet(246/437 Pages) INTEL

246 / 437 page

Integrated Graphics Device Registers (D2:F0,F1)

(Intel® 82Q35, 82Q33, 82G33 GMCH Only)

246

Datasheet

8.1.4

PCISTS2—PCI Status

B/D/F/Type:

0/2/0/PCI

Address Offset:

06–07h

Default Value:

0090h

Access:

Size:

16 bits

PCISTS is a 16-bit status register that reports the occurrence of a PCI compliant

master abort and PCI compliant target abort. PCISTS also indicates the DEVSEL#

timing that has been set by the IGD.

Bit

Access &

Default

Description

Detected Parity Error (DPE): Since the IGD does not detect parity,

this bit is always hardwired to 0.

Signaled System Error (SSE): The IGD never asserts SERR#,

therefore this bit is hardwired to 0.

Received Master Abort Status (RMAS): The IGD never gets a

Master Abort, therefore this bit is hardwired to 0.

Received Target Abort Status (RTAS): The IGD never gets a

Target Abort, therefore this bit is hardwired to 0.

Signaled Target Abort Status (STAS): Hardwired to 0. The IGD

does not use target abort semantics.

10:9

00b

DEVSEL Timing (DEVT): N/A. These bits are hardwired to "00".

Master Data Parity Error Detected (DPD): Since Parity Error

Response is hardwired to disabled (and the IGD does not do any

parity detection), this bit is hardwired to 0.

Fast Back-to-Back (FB2B): Hardwired to 1. The IGD accepts fast

back-to-back when the transactions are not to the same agent.

User Defined Format (UDF): Hardwired to 0.

66 MHz PCI Capable (66C): N/A - Hardwired to 0.

Capability List (CLIST): This bit is set to 1 to indicate that the

Configuration Space containing a pointer to the location of the first

item in the list.

Interrupt Status (INTSTS): This bit reflects the state of the

interrupt in the device. Only when the Interrupt Disable bit in the

command register is a 0 and this Interrupt Status bit is a 1, will the

devices INTx# signal be asserted.

2:0

000b

Reserved

82G33 Datasheet(PDF) 246 Page - Intel Corporation

82G33 Datasheet(HTML) 246 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL