82G33 datasheet(249/437 Pages) INTEL

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Integrated Graphics Device Registers (D2:F0,F1)

(Intel® 82Q35, 82Q33, 82G33 GMCH Only)

Datasheet

249

8.1.9

HDR2—Header Type

B/D/F/Type:

0/2/0/PCI

Address Offset:

0Eh

Default Value:

80h

Access:

Size:

8 bits

This register contains the Header Type of the IGD.

Bit

Access &

Default

Description

Multi Function Status (MFUNC): Indicates if the device is a Multi-

Function Device. The Value of this register is determined by Device

#0, offset 54h, DEVEN[4]. If Device 0 DEVEN[4] is set, the MFUNC bit

is also set.

6:0

00h

Header Code (H): This is a 7-bit value that indicates the Header

Code for the IGD. This code has the value 00h, indicating a type 0

configuration space format.

8.1.10

GMADR—Graphics Memory Range Address

B/D/F/Type:

0/2/0/PCI

Address Offset:

18–1Bh

Default Value:

00000008h

Access:

RW, RO, RW/L

Size:

32 bits

IGD graphics memory base address is specified in this register.

Bit

Access &

Default

Description

31:29

000b

Memory Base Address (MBA): Set by the OS, these bits correspond

to address signals 31:29.

RW/L

512MB Address Mask (512ADMSK): This Bit is either part of the

Memory Base Address (R/W) or part of the Address Mask (RO),

depending on the value of MSAC[1:0]. See MSAC (D2:F0, offset 62h)

for details.

RW/L

256 MB Address Mask (256ADMSK): This bit is either part of the

Memory Base Address (R/W) or part of the Address Mask (RO),

depending on the value of MSAC[1:0]. See MSAC (D2:F0, offset 62h)

for details.

26:4

000000h

Address Mask (ADM): Hardwired to 0s to indicate at least 128 MB

address range.

Prefetchable Memory (PREFMEM): Hardwired to 1 to enable

prefetching.

2:1

00b

Memory Type (MEMTYP): Hardwired to 0 to indicate 32-bit address.

Memory/IO Space (MIOS): Hardwired to 0 to indicate memory

space.

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