82G33 datasheet(247/437 Pages) INTEL

247 / 437 page

Integrated Graphics Device Registers (D2:F0,F1)

(Intel® 82Q35, 82Q33, 82G33 GMCH Only)

Datasheet

247

8.1.5

RID2—Revision Identification

B/D/F/Type:

0/2/0/PCI

Address Offset:

08h

Default Value:

00h

Access:

Size:

8 bits

This register contains the revision number for Device #2 Functions 0 and 1.

Bit

Access &

Default

Description

7:0

00h

Revision Identification Number (RID): This is an 8-bit value that

indicates the revision identification number for the GMCH Device 2.

Refer to the Intel® 3 Series Express Chipset Family Specification

Update for the value of the Revision ID register.

8.1.6

CC—Class Code

B/D/F/Type:

0/2/0/PCI

Address Offset:

09–0Bh

Default Value:

030000h

Access:

Size:

24 bits

This register contains the device programming interface information related to the

Sub-Class Code and Base Class Code definition for the IGD. This register also contains

the Base Class Code and the function sub-class in relation to the Base Class Code.

Bit

Access &

Default

Description

23:16

03h

Base Class Code (BCC): This is an 8-bit value that indicates the

base class code for the GMCH. This code has the value 03h, indicating

a Display Controller.

15:8

00h

Sub-Class Code (SUBCC): Value will be determined based on Device

0 GGC register, GMS and IVD fields.

00h = VGA compatible

80h = Non VGA (GMS = "0000" or IVD = "1")

7:0

00h

Programming Interface (PI):

00h = Hardwired as a Display controller.

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