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82G33 Datasheet(PDF) 243 Page - Intel Corporation |
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82G33 Datasheet(HTML) 243 Page - Intel Corporation |
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243 / 437 page ![]() Integrated Graphics Device Registers (D2:F0,F1) (Intel® 82Q35, 82Q33, 82G33 GMCH Only) Datasheet 243 Address Offset Register Symbol Register Name Default Value Access 30–33h ROMADR Video BIOS ROM Base Address 00000000h RO 34h CAPPOINT Capabilities Pointer 90h RO 3Eh MINGNT Minimum Grant 00h RO 3Fh MAXLAT Maximum Latency 00h RO 40–50h CAPID0 Capability Identifier 000000000 000000001 000000000 10B0009h RO 52–53h MGGC GMCH Graphics Control Register 0030h RO 54–57h DEVEN Device Enable 000003DBh RO 58–5Bh SSRW Software Scratch Read Write 00000000h RW 5C–5Fh BSM Base of Stolen Memory 07800000h RO 60–61h HSRW Hardware Scratch Read Write 0000h RW C0h GDRST Graphics Debug Reset 00h RO, RW/L D0–D1h PMCAPID Power Management Capabilities ID 0001h RWO, RO D2–D3h PMCAP Power Management Capabilities 0022h RO D4–D5h PMCS Power Management Control/Status 0000h RO, RW E0–E1h SWSMI Software SMI 0000h RW E4–E7h ASLE System Display Event Register 00000000h RW FC–FFh ASLS ASL Storage 00000000h RW 8.1.1 VID2—Vendor Identification B/D/F/Type: 0/2/0/PCI Address Offset: 00–01h Default Value: 8086h Access: RO Size: 16 bits This register combined with the Device Identification register uniquely identifies any PCI device. Bit Access & Default Description 15:0 RO 8086h Vendor Identification Number (VID): PCI standard identification for Intel. |
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