82G33 datasheet(308/437 Pages) INTEL

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Intel® Management Engine (ME) Subsystem Registers (D3:F0,F1,F2,F3)

308

Datasheet

9.2.9

HECI_MBAR— HECI MMIO Base Address

B/D/F/Type:

0/3/1/PCI

Address Offset:

10–17h

Default Value:

0000000000000004h

Access:

RO, RW

Size:

64 bits

This register allocates space for the HECI memory mapped registers defined in Section

1.5.6.

Bit

Access &

Default

Description

63:4

00000000

0000000h

Base Address (BA): Base address of register memory space.

Prefetchable (PF): Indicates that this range is not pre-fetchable

2:1

10b

Type (TP): Indicates that this range can be mapped anywhere in 32-

bit address space

Resource Type Indicator (RTE): Indicates a request for register

memory space.

9.2.10

SS— Sub System Identifiers

B/D/F/Type:

0/3/1/PCI

Address Offset:

2C–2Fh

Default Value:

00000000h

Access:

RWO

Size:

32 bits

Bit

Access &

Default

Description

31:16

RWO

0000h

Subsystem ID (SSID): This field indicates the sub-system identifier.

This field should be programmed by BIOS during boot-up. Once

written, this register becomes Read Only. This field can only be cleared

by PLTRST#.

15:0

RWO

0000h

Subsystem Vendor ID (SSVID): This field indicates the sub-system

vendor identifier. This field should be programmed by BIOS during

boot-up. Once written, this register becomes Read Only. This field can

only be cleared by PLTRST#.

82G33 Datasheet(PDF) 308 Page - Intel Corporation

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