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82G33 Datasheet(PDF) 310 Page - Intel Corporation

Part # 82G33
Description  Graphics and Memory Controller Hub
PDF  437 Pages
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

82G33 Datasheet(HTML) 310 Page - Intel Corporation

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Intel® Management Engine (ME) Subsystem Registers (D3:F0,F1,F2,F3)
310
Datasheet
9.2.14
MLAT— Maximum Latency
B/D/F/Type:
0/3/1/PCI
Address Offset:
3Fh
Default Value:
00h
Access:
RO
Size:
8 bits
Bit
Access &
Default
Description
7:0
RO
00h
Latency (LAT): Not implemented, hardwired to 0.
9.2.15
HFS— Host Firmware Status
B/D/F/Type:
0/3/1/PCI
Address Offset:
40–43h
Default Value:
00000000h
Access:
RO
Size:
32 bits
Bit
Access &
Default
Description
31:0
RO
00000000h
Firmware Status Host Access (FS_HA): This field indicates current
status of the firmware for the HECI controller. This field is the host's
read only access to the FS field in the ME Firmware Status AUX
register.
9.2.16
PID— PCI Power Management Capability ID
B/D/F/Type:
0/3/1/PCI
Address Offset:
50–51h
Default Value:
8C01h
Access:
RO
Size:
16 bits
Bit
Access &
Default
Description
15:8
RO
8Ch
Next Capability (NEXT): This field indicates the location of the next
capability item in the list. This is the Message Signaled Interrupts
capability.
7:0
RO
01h
Cap ID (CID): This field indicates that this pointer is a PCI power
management.



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