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OR3TP12 Datasheet(PDF) 31 Page - Agere Systems |
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OR3TP12 Datasheet(HTML) 31 Page - Agere Systems |
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31 / 128 page  Lucent Technologies Inc. 31 Data Sheet ORCA OR3TP12 FPSC March 2000 Embedded Master/Target PCI Interface Lucent Technologies Inc. PCI Bus Core Detailed Description (continued) Embedded Core Configuration Options Table 8 lists all options in the embedded core that can be selected via the FPSC configuration manager. The table also lists the settings available for each option, which is accessible using the FPSC design kit software. Table 8. PCI Bus Core Options Settable via FPGA Configuration RAM Bits Description Hex Address in PCI Configuration Space Optional Settings Revision ID 0x08 Any 8-bit value. Class Code 0x09—0x0B Any 24-bit value. Bus Master Support 0x4: Bit 2 Three options: s Target Only: Powerup value: 0; Access Type: Read-only s Master/Target: Powerup value: 0; Access Type: Read/Write s Master: Powerup value: 1; Access Type: Read- only Data Parity Error Detected 0x4: Bit 8 Mask value for wire-OR output pci_cfg_stat. Target Abort Signal 0x4: Bit 11 Mask value for wire-OR output pci_cfg_stat. Target Abort Received 0x4: Bit 12 Mask value for wire-OR output pci_cfg_stat. Master Abort Received 0x4: Bit 13 Mask value for wire-OR output pci_cfg_stat. System Error Signaled 0x4: Bit 14 Mask value for wire-OR output pci_cfg_stat. Parity Error Detected 0x4: Bit 15 Mask value for wire-OR output pci_cfg_stat. Latency Timer Initial Value 0x0D Any 8-bit value divisible by eight (XXXXX000). Base Address Register (BAR0/1) Area 1 0x10—0x17 s Refer to PCI Specification 2.2, Section 6.2.5.1 s Up to two 32-bit BARs, one 64-bit BAR, or none (i.e., unprogrammed). s 32-bit BARs can Target memory or I/O space. s Memory can be prefetchable or nonprefetchable. s If 64-bit BAR, must be memory; page size can be from 24 bytes to 264 bytes. s If 32-bit I/O BAR, page size can be from 22 bytes to 232 bytes. s If 32-bit memory BAR, address space can be 24 bytes to the maximum (220 bytes or 232 bytes). Base Address Register (BAR2/3) Area 2 0x18—0x1F Same as for BAR area 1. Base Address Register (BAR4/5) Area 3 0x20—0x27 Same as for BAR area 1. |
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