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ELANSC520 Datasheet(PDF) 124 Page - Advanced Micro Devices

Part # ELANSC520
Description  Microcontroller
PDF  440 Pages
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Manufacturer  AMD [Advanced Micro Devices]
Direct Link  http://www.amd.com
Logo AMD - Advanced Micro Devices

ELANSC520 Datasheet(HTML) 124 Page - Advanced Micro Devices

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General-Purpose Bus Controller Registers
10-8
Élan™SC520 Microcontroller Register Set Manual
GP Chip Select Pulse Width (GPCSPW)
Memory-Mapped
MMCR Offset C09h
Register Description
This register is used to program the pulse width for all the GP bus chip selects.
Bit Definitions
Programming Notes
Before using one of the GPCS7–GPCS1 signals, software must set the corresponding GPCSx_SEL bit in the CSPFS
register (see page 20-7). Before using the GPCS0 signal, software must set the PIO27_SEL bit in the PIOPFS31–
16 register (see page 20-5).
Figure 10-1 on page 10-7 shows the relationships between the various adjustable GP bus timing parameters.
7
6
5
4
3
2
1
0
Bit
GPCS_WIDTH[7–0]
Reset
00000000
R/W
R/W
Bit
Name
Function
7
–0
GPCS_WIDTH
[7–0]
Signal Width for the GP Bus Chip Selects
This field adjusts the signal pulse width (time) of all the GP bus chip selects.
The resolution of this parameter is one internal (33-MHz) clock period.
The width used is (GPCS_WIDTH + 1) internal clock periods; i.e., if GPCS_WIDTH is 0, the
pulse is one clock period wide.



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