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S70FS01GS Datasheet(PDF) 29 Page - Cypress Semiconductor |
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S70FS01GS Datasheet(HTML) 29 Page - Cypress Semiconductor |
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29 / 141 page ![]() S70FS01GS Document Number: 002-03833 Rev. *C Page 29 of 141 5. Timing Specifications 5.1 Key to Switching Waveforms Figure 5.1 Waveform Element Meanings 5.2 AC Test Conditions Figure 5.2 Test Setup Notes: 1. Input slew rate measured from input pulse min to max at VDD max. Example: (1.9V x 0.8) - (1.9V x 0.2) = 1.14V; 1.14V/1.25V/ns = 0.9ns rise or fall time. 2. AC characteristics tables assume clock and data signals have the same slew rate (slope). Table 5.1 AC Measurement Conditions Symbol Parameter Min Max Unit CL Load Capacitance 30 pF Input Pulse Voltage 0.2 x VDD 0.8 VDD V Input slew rate 0.23 1.25 V/ns Input Rise and Fall Times 0.9 5 ns Input Timing Ref Voltage 0.5 VDD V Output Timing Ref Voltage 0.5 VDD V Input Symbol Output Valid at logic high or low Valid at logic high or low High Impedance Any change permitted Logic high Logic low Valid at logic high or low Valid at logic high or low High Impedance Changing, state unknown Logic high Logic low Device Under Test CL |
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