S70FS01GS datasheet(63/141 Pages) CYPRESS

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S70FS01GS

Document Number: 002-03833 Rev. *C

Page 63 of 141

8.2

Write Enable Command

The Write Enable (WREN) command must be written prior to any command that modifies non-volatile data. The WREN command

sets the Write Enable Latch (WEL) bit. The WEL bit is cleared to 0 (disables writes) during power-up, hardware reset, or after the

device completes the following commands:

Reset

Page Program (PP or 4PP)

Parameter 4KB Erase (P4E or 4P4E)

Sector Erase (SE or 4SE)

Bulk Erase (BE)

Write Disable (WRDI)

Write Registers (WRR)

Write Any Register (WRAR)

OTP Byte Programming (OTPP)

Advanced Sector Protection Register Program (ASPP)

Persistent Protection Bit Program (PPBP)

Persistent Protection Bit Erase (PPBE)

Password Program (PASSP)

Program Non-Volatile Data Learning Register (PNVDLR)

8.3

Block Protection

The Block Protect bits (Status Register bits BP2, BP1, BP0) in combination with the Configuration Register TBPROT_O bit can be

used to protect an address range of the main Flash array from program and erase operations. The size of the range is determined by

the value of the BP bits and the upper or lower starting point of the range is selected by the TBPROT_O bit of the configuration

The FS01GS contains two FS512S devices to provide the lower and upper half of the overall 1 Gbit address space. Each FS512S

has its own set of Block Protection configuration bits that affect only the address space of that FS512S but, the WP# signal is

common to both devices.

Table 8.1

Upper Array Start of Protection (TBPROT_O = 0)

Status Register Content

Protected Fraction of

Memory Array

Protected Memory (KBytes)

BP2

BP1

BP0

FS512S

512 Mb

None

Upper 64th

1024

Upper 32nd

2048

Upper 16th

4096

Upper 8th

8192

Upper 4th

16384

Upper Half

32768

All Sectors

65536

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