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S70FS01GS Datasheet(PDF) 94 Page - Cypress Semiconductor |
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S70FS01GS Datasheet(HTML) 94 Page - Cypress Semiconductor |
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94 / 141 page ![]() S70FS01GS Document Number: 002-03833 Rev. *C Page 94 of 141 Figure 9.32 DDR Quad I/O Read Initial Access (4-Byte Address, EEh or EDh [CR2V[7]=1]) QPI Mode Note: 1. Example DLP of 34h (or 00110100) CS# SCLK IO0 IO1 IO2 IO3 Phase 4 0 28 24 20 16 12 8 4 0 4 0 7 6 5 4 3 2 1 0 4 0 4 0 5 1 29 25 21 17 13 9 5 1 5 1 7 6 5 4 3 2 1 0 5 1 5 1 6 2 30 26 22 18 14 10 6 2 6 2 7 6 5 4 3 2 1 0 6 2 6 2 7 3 31 27 23 19 15 11 7 3 7 3 7 6 5 4 3 2 1 0 7 3 7 3 Instruct. Address Mode Dummy DLP D1 D2 |
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