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S70FS01GS

Document Number: 002-03833 Rev. *C

Page 57 of 141

7.7.6

Configuration Register 4

Configuration register 4 controls the main Flash array read commands burst wrap behavior. The burst wrap configuration does not

affect commands reading from areas other than the main Flash array e.g. read commands for registers or OTP array. The non-

volatile version of the register provides the ability to set the start up (boot) state of the controls as the contents are copied to the

volatile version of the register during the POR, hardware reset, or software reset. The volatile version of the register controls the

feature behavior during normal operation. The register bits can be read and changed using the Read Any Register and Write Any

7.7.6.1

Configuration Register 4 Non-volatile (CR4NV)

Related Commands: Read Any Register (RDAR 65h), Write Any Register (WRAR 71h).

Output Impedance Non-volatile CR4NV[7:5]:

These bits control the POR, hardware reset, or software reset state of the IO signal

output impedance (drive strength). Multiple drive strength are available to help match the output impedance with the system printed

circuit board environment to minimize overshoot and ringing. These non-volatile output impedance configuration bits enable the

device to start immediately (boot) with the appropriate drive strength.

Wrap Enable Non-volatile CR4NV[4]:

This bit controls the POR, hardware reset, or software reset state of the wrap enable. The

commands affected by Wrap Enable are: Quad I/O Read, and DDR Quad I/O Read. This configuration bit enables the device to start

immediately (boot) in wrapped burst read mode rather than the legacy sequential read mode.

Wrap Length Non-volatile CR4NV[1:0]:

These bits controls the POR, hardware reset, or software reset state of the wrapped read

length and alignment. These non-volatile configuration bits enable the device to start immediately (boot) in wrapped burst read mode

rather than the legacy sequential read mode.

Table 7.15

Configuration Register 4 Non-volatile (CR4NV)

Bits

Field Name

Function

Type

Default

State

Description

OI_O

Output Impedance

OTP

See Table 7.16, Output Impedance Control on page 57

WE_O

Wrap Enable

0= Wrap Enabled

1= Wrap Disabled

RFU

Reserved

Reserved for Future Use

RFU

Reserved

Reserved for Future Use

WL_O

Wrap Length

00 = 8-byte wrap

01= 16 byte wrap

10= 32 byte wrap

11= 64 byte wrap

Table 7.16

Output Impedance Control

CR4NV[7:5]

Impedance Selection

Typical Impedance to VSS (Ohms)

Typical Impedance to VDD (Ohms)

Notes

000

Factory Default

001

124

105

010

011

100

101

110

111

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