S70FS01GS datasheet(62/141 Pages) CYPRESS

62 / 141 page

S70FS01GS

Document Number: 002-03833 Rev. *C

Page 62 of 141

Data Protection

8.1

Secure Silicon Region (OTP)

The device has a 1024 byte One Time Program (OTP) address space that is separate from the main Flash array. The OTP area is

divided into 32, individually lockable, 32 byte aligned and length regions.

The OTP memory space is intended for increased system security. OTP values can “mate” a flash component with the system CPU/

ASIC to prevent device substitution. See Section 7.5 OTP Address Space on page 44, Section 9.7.1 OTP Program (OTPP 42h)

on page 104, and Section 9.7.2 OTP Read (OTPR 4Bh) on page 104.

8.1.1

Reading OTP Memory Space

The OTP Read command uses the same protocol as Fast Read. OTP Read operations outside the valid 1KB OTP address range

will yield indeterminate data.

8.1.2

Programming OTP Memory Space

The protocol of the OTP programming command is the same as Page Program. The OTP Program command can be issued multiple

times to any given OTP address, but this address space can never be erased.

Automatic ECC is programmed on the first programming operation to each 16 byte region. Programming within a 16 byte region

more than once disables the ECC. It is recommended to program each 16 byte portion of each 32 byte region once so that ECC

remains enabled to provide the best data integrity.

The valid address range for OTP Program is depicted in Figure 7.1, OTP Address Space on page 44. OTP Program operations

outside the valid OTP address range will be ignored, without P_ERR in SR1V set to “1”. OTP Program operations within the valid

OTP address range, while FREEZE = 1, will fail with P_ERR in SR1V set to “1”. The OTP address space is not protected by the

selection of an ASP protection mode. The Freeze bit (CR1V[0]) may be used to protect the OTP Address Space.

8.1.3

Cypress Programmed Random Number

Cypress standard practice is to program the low order 16 bytes of the OTP memory space (locations 0x0 to 0xF) with a 128-bit

random number using the Linear Congruential Random Number Method. The seed value for the algorithm is a random number

concatenated with the day and time of tester insertion.

8.1.4

Lock Bytes

The LSB of each Lock byte protects the lowest address region related to the byte, the MSB protects the highest address region

related to the byte. The next higher address byte similarly protects the next higher 8 regions. The LSB bit of the lowest address Lock

Byte protects the higher address 16 bytes of the lowest address region. In other words, the LSB of location 0x10 protects all the Lock

Bytes and RFU bytes in the lowest address region from further programming. See Section 7.5 OTP Address Space on page 44.

S70FS01GS Datasheet(PDF) 62 Page - Cypress Semiconductor